Saturday, October 15, 2011

Lab 3 - Concurrent Code and Symbol Interfacing

I. Introduction


           Unlike Sequential Logic Circuits whose outputs are dependant on both their present inputs and their previous output state giving them some form of Memory, the outputs of Combinational Logic Circuits are only determined by the logical function of their current input state, logic "0" or logic "1", at any given instant in time as they have no feedback, and any changes to the signals being applied to their inputs will immediately have an effect at the output. In other words, in a Combinational Logic Circuit, the output is dependant at all times on the combination of its inputs and if one of its inputs condition changes state so does the output as combinational circuits have "no memory", "timing" or "feedback loops".

II. Objective
           To be able to implement combinational logic circuits with concurrent code and interface their symbols with each other


III. Conceptual Framework





IV. Data & Results

3.1 Create a multiplexer for two 4 bits numbers
library IEEE;

use IEEE.std_logic_1164.all;


entity twone is

port (A, B : IN STD_LOGIC_VECTOR(3 downto 0);

S : IN BIT;

X : OUT STD_LOGIC_VECTOR(3 downto 0));

end twone;

architecture fourbit of twone is

begin

process (S)

begin

if (S = '0') then

X<=A;

else

X<=B;

end if;

end process;

end fourbit;


3.2 Design a Comparator for two 4 bits numbers using VHDL. If A>B, the output is 1.
LIBRARY ieee;

USE ieee.std_logic_1164.all;


entity twofour is

port (x, y : IN BIT_VECTOR (3 downto 0);

z : OUT BIT);

end twofour;


architecture behavior of twofour is

begin

z<= '1' when (x>y) else '0';

end behavior;

3.3 Design comparator for two 4 bits numbers in 7-segment. The 7-segment will display the greater number







V. Analysis


           In this experiment, the modules of the comparator and multiplexer has to be implemented as a single working circuit wherein combinational logic circuit would be implemented with concurrent codes and their symbol would interfere with each other. Concurrent codes are a form of superimposed codes that can be decoded efficiently and so we observed on how the circuit will respond given with two different inputs.


VI. Conclusion



           In this experiment, our group was able to implement combinational logic circuit with concurrent codes. At first, we have some difficulties in understanding the flow of the whole circuit. But then, we took the solution of understanding the flow of the inputs and outputs in the comparator. And with the resultant output of the comparator, we took it as an input for the multiplexer circuit design.

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